FT2232H breakout board

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FT2232H breakout board

This is the documentation page for the FT2232H breakout board.

Overview

The FT2232H breakout board has an USB connector, two 20-pin HDR-standard IO connectors (one for BUS0 and one for BUS1), and one 40-pin terasic compatible connector. The brains of the PCB, of course, is an FT2232H chip.

External resources

Pinout

The SV1 connector is designed to be connected to the 40 pin expansion connector of Terasic FPGA boards. This can be done with a standard 40 pin IDE cable, provided that it isn't too long.

40-pin connector SV1 is connected as follows:

ACBUS512NC
NC34NC
ADBUS056ADBUS1
ADBUS278ADBUS3
ADBUS4910ADBUS5
5V1112GND
ADBUS61314ADBUS7
ACBUS01516ACBUS1
ACBUS21718ACBUS3
ACBUS41920ACBUS5
ACBUS62122ACBUS7
BDBUS02324BDBUS1
BDBUS22526BDBUS3
BDBUS42728BDBUS5
3V32930GND
BDBUS63132BDBUS7
BCBUS03334BCBUS1
BCBUS23536BCBUS3
BCBUS43738BCBUS5
BCBUS63940BCBUS7

Connectors SV4 and SV5 are designed to be compatible with the 20-pin IO connectors also found on other BitWizard boards.

20-pin connector SV4 is connected as follows:

GND12GND
ADBUS034ADBUS1
ADBUS256ADBUS3
ADBUS478ADBUS5
ADBUS6910ADBUS7
ACBUS01112ACBUS1
ACBUS21314ACBUS3
ACBUS41516ACBUS5
ACBUS61718ACBUS7
3V319203V3

20-pin connector SV5 is connected as follows:

GND12GND
BDBUS034BDBUS1
BDBUS256BDBUS3
BDBUS478BDBUS5
BDBUS6910BDBUS7
BCBUS01112BCBUS1
BCBUS21314BCBUS3
BCBUS41516BCBUS5
BCBUS61718BCBUS7
3V319203V3

LEDS

  • led1 is connected to VCC

Jumper settings

For 2.0

SV2: 3V3 supply selection
1-2: Direct from FPGA board (through 40-pin connector)
2-3: From regulator (see SV3 settings)

SV3: Regulator power source selection
1-2: Powered from USB
2-3: Powered from FPGA board (through 40-pin connector)

For 2.1

J1: 3V3 supply selection
1-2: Direct from FPGA board (through 40-pin connector)
2-3: From regulator (see J2 settings)

J2: Regulator power source selection (physical position is the same as in 2.0, only numbering has changed)
1-2: Powered from FPGA board (through 40-pin connector)
2-3: Powered from USB

Future hardware enhancements

Changelog

2.1

  • Renamed SV2 to J1
  • Renamed SV3 to J2
  • Jumper settings marked on PCB
  • Moved center of mounting holes to 3mm from PCB edge

2.0

  • Initial public release