FT2232H breakout board
FT2232H breakout board
This is the documentation page for the FT2232H breakout board.
Overview
The FT2232H breakout board has an USB connector, two 6 pin SPI connectors, two 4 pin I2C connectors and a general purpose connector.
External resources
Pinout
The SV1 connector is designed to be connected to the 40 pin expansion connector of Terasic FPGA boards. This can be done with a standard 40 pin IDE cable, provided that it isn't too long.
40-pin connector SV1 is connected as follows:
ACBUS5 | 1 | 2 | NC |
NC | 3 | 4 | NC |
ADBUS0 | 5 | 6 | ADBUS1 |
ADBUS2 | 7 | 8 | ADBUS3 |
ADBUS4 | 9 | 10 | ADBUS5 |
5V | 11 | 12 | GND |
ADBUS6 | 13 | 14 | ADBUS7 |
ACBUS0 | 15 | 16 | ACBUS1 |
ACBUS2 | 17 | 18 | ACBUS3 |
ACBUS4 | 19 | 20 | ACBUS5 |
ACBUS6 | 21 | 22 | ACBUS7 |
BDBUS0 | 23 | 24 | BDBUS1 |
BDBUS2 | 25 | 26 | BDBUS3 |
BDBUS4 | 27 | 28 | BDBUS5 |
3V3 | 29 | 30 | GND |
BDBUS6 | 31 | 32 | BDBUS7 |
BCBUS0 | 33 | 34 | BCBUS1 |
BCBUS2 | 35 | 36 | BCBUS3 |
BCBUS4 | 37 | 38 | BCBUS5 |
BCBUS6 | 39 | 40 | BCBUS7 |
Connectors SV4 and SV5 are designed to be compatible with the 20-pin IO connectors also found on other BitWizard boards.
20-pin connector SV4 is connected as follows:
GND | 1 | 2 | GND |
ADBUS0 | 3 | 4 | ADBUS1 |
ADBUS2 | 5 | 6 | ADBUS3 |
ADBUS4 | 7 | 8 | ADBUS5 |
ADBUS6 | 9 | 10 | ADBUS7 |
ACBUS0 | 11 | 12 | ACBUS1 |
ACBUS2 | 13 | 14 | ACBUS3 |
ACBUS4 | 15 | 16 | ACBUS5 |
ACBUS6 | 17 | 18 | ACBUS7 |
3V3 | 19 | 20 | 3V3 |
20-pin connector SV5 is connected as follows:
GND | 1 | 2 | GND |
BDBUS0 | 3 | 4 | BDBUS1 |
BDBUS2 | 5 | 6 | BDBUS3 |
BDBUS4 | 7 | 8 | BDBUS5 |
BDBUS6 | 9 | 10 | BDBUS7 |
BCBUS0 | 11 | 12 | BCBUS1 |
BCBUS2 | 13 | 14 | BCBUS3 |
BCBUS4 | 15 | 16 | BCBUS5 |
BCBUS6 | 17 | 18 | BCBUS7 |
3V3 | 19 | 20 | 3V3 |
LEDS
- led1 is connected to VCC
Jumper settings
For 2.0
SV2: 3V3 supply selection
1-2: Direct from FPGA board (through 40-pin connector)
2-3: From regulator (see SV3 settings)
SV3: Regulator power source selection
1-2: Powered from USB
2-3: Powered from FPGA board (through 40-pin connector)
For 2.1
J1: 3V3 supply selection
1-2: Direct from FPGA board (through 40-pin connector)
2-3: From regulator (see J2 settings)
J2: Regulator power source selection (physical position is the same as in 2.0, only numbering has changed)
1-2: Powered from FPGA board (through 40-pin connector)
2-3: Powered from USB
Future hardware enhancements
Changelog
2.1
- Renamed SV2 to J1
- Renamed SV3 to J2
- Jumper settings marked on PCB
- Moved center of mounting holes to 3mm from PCB edge
2.0
- Initial public release