Difference between revisions of "Cyclone dev board"
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This is the documentation page for the Cyclone dev board. |
This is the documentation page for the Cyclone dev board. |
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== |
== Overview == |
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The Cyclone dev board has an USB connector and 4 20-pin IO connector. The brains of the PCB is an EP1C6T144C8 (or compatible) chip. |
The Cyclone dev board has an USB connector and 4 20-pin IO connector. The brains of the PCB is an EP1C6T144C8 (or compatible) chip. |
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== |
== External resources == |
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== Pinout == |
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The 20 pin connectors are connected as follows |
The 20 pin connectors are connected as follows |
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<tr><td>20</td><td>VCC</td></tr> |
<tr><td>20</td><td>VCC</td></tr> |
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</table> |
</table> |
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SV5 |
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<table border=1> |
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<tr><td>1</td><td>3V3</td></tr> |
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<tr><td>2</td><td>GND</td></tr> |
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<tr><td>3</td><td>CLK3</td></tr> |
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<tr><td>4</td><td>CLK2</td></tr> |
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<tr><td>5</td><td>CLK1</td></tr> |
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<tr><td>6</td><td>CLK0</td></tr> |
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</table> |
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SV6 |
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<table border=1> |
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<tr><td>1</td><td>GND</td></tr> |
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<tr><td>2</td><td>VCCINT</td></tr> |
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<tr><td>3</td><td>3V3</td></tr> |
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<tr><td>4</td><td>5V</td></tr> |
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</table> |
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JP2 |
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<table border=1> |
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<tr><td>1</td><td>EXT_RESET</td></tr> |
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<tr><td>2</td><td>GND</td></tr> |
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</table> |
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* led1 is connected to VCC |
* led1 is connected to VCC |
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* led6 is connected to pin 141 |
* led6 is connected to pin 141 |
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== |
== Jumper settings == |
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JP1: 5V power supply selection<br> |
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1-2 5V from USB<br> |
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3-4 5V from wall-wart powered regulator<br> |
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== Programming == |
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This section describes how you get your program into the FPGA. |
This section describes how you get your program into the FPGA. |
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=== Linux === |
=== Linux === |
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=== |
=== Windows === |
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== |
== Writing programs == |
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The chip is an EP1C6T144C8. http://www.altera.com/literature/lit-cyc.jsp |
The chip is an EP1C6T144C8. http://www.altera.com/literature/lit-cyc.jsp |
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== |
== Future hardware enhancements == |
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* Update Mini-B footprint |
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⚫ | |||
== Changelog == |
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=== 4.1 === |
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⚫ | |||
* Initial public release |
Latest revision as of 13:23, 1 February 2012
Cyclone dev board
This is the documentation page for the Cyclone dev board.
Overview
The Cyclone dev board has an USB connector and 4 20-pin IO connector. The brains of the PCB is an EP1C6T144C8 (or compatible) chip.
External resources
Pinout
The 20 pin connectors are connected as follows
SV1
1 | GND |
2 | GND |
3 | pin 3 |
4 | pin 2 |
5 | pin 5 |
6 | pin 4 |
7 | pin 6 |
8 | pin 7 |
9 | pin 26 |
10 | pin 10 |
11 | pin 32 |
12 | pin 27 |
13 | pin 34 |
14 | pin 33 |
15 | pin 36 |
16 | pin 35 |
17 | pin 38 |
18 | pin 37 |
19 | VCC |
20 | VCC |
SV2
1 | GND |
2 | GND |
3 | pin 40 |
4 | pin 39 |
5 | pin 42 |
6 | pin 41 |
7 | pin 49 |
8 | pin 47 |
9 | pin 51 |
10 | pin 50 |
11 | pin 53 |
12 | pin 52 |
13 | pin 58 |
14 | pin 57 |
15 | pin 60 |
16 | pin 59 |
17 | pin 67 |
18 | pin 62 |
19 | VCC |
20 | VCC |
SV3
1 | GND |
2 | GND |
3 | pin 69 |
4 | pin 68 |
5 | pin 73 |
6 | pin 72 |
7 | pin 75 |
8 | pin 74 |
9 | pin 77 |
10 | pin 76 |
11 | pin 82 |
12 | pin 78 |
13 | pin 84 |
14 | pin 83 |
15 | pin 96 |
16 | pin 85 |
17 | pin 110 |
18 | pin 109 |
19 | VCC |
20 | VCC |
SV4
1 | GND |
2 | GND |
3 | pin 112 |
4 | pin 111 |
5 | pin 114 |
6 | pin 113 |
7 | pin 121 |
8 | pin 119 |
9 | pin 123 |
10 | pin 122 |
11 | pin 128 |
12 | pin 124 |
13 | pin 130 |
14 | pin 129 |
15 | pin 132 |
16 | pin 131 |
17 | pin 140 |
18 | pin 139 |
19 | VCC |
20 | VCC |
SV5
1 | 3V3 |
2 | GND |
3 | CLK3 |
4 | CLK2 |
5 | CLK1 |
6 | CLK0 |
SV6
1 | GND |
2 | VCCINT |
3 | 3V3 |
4 | 5V |
JP2
1 | EXT_RESET |
2 | GND |
- led1 is connected to VCC
- led2 is connected to pin 144
- led3 is connected to conf_done
- led4 is connected to pin 143
- led5 is connected to pin 142
- led6 is connected to pin 141
Jumper settings
JP1: 5V power supply selection
1-2 5V from USB
3-4 5V from wall-wart powered regulator
Programming
This section describes how you get your program into the FPGA.
Linux
Windows
Writing programs
The chip is an EP1C6T144C8. http://www.altera.com/literature/lit-cyc.jsp
Future hardware enhancements
- Update Mini-B footprint
Future software enhancements
Changelog
4.1
- Initial public release