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- 00:11, 21 February 2012 diff hist +69 Main Page
- 17:47, 17 February 2012 diff hist 0 Servo →1.2
- 17:47, 17 February 2012 diff hist +72 Servo →Changelog
- 17:46, 17 February 2012 diff hist -99 Servo →Future hardware enhancements
- 17:20, 17 February 2012 diff hist +375 Servo →Overview
- 17:17, 17 February 2012 diff hist +12 Servo →Jumper settings
- 17:17, 17 February 2012 diff hist +53 Servo
- 20:48, 15 February 2012 diff hist +202 RGB clock →The software
- 20:14, 15 February 2012 diff hist +1,851 N Servo 1.0 protocol Created page with 'The addresses on the SPI bus are 7 bits wide. The lower bit specifies if the transaction is to be a read or a write. Write transactions have the lower bit cleared (0), read trans…'
- 19:09, 15 February 2012 diff hist +207 Servo
- 19:06, 15 February 2012 diff hist 0 SPI LCD →External resources
- 19:01, 15 February 2012 diff hist +1,132 Servo
- 16:33, 15 February 2012 diff hist 0 7FETs
- 16:33, 15 February 2012 diff hist 0 Main Page
- 16:32, 15 February 2012 diff hist +23 N SPI 6FETs moved SPI 6FETs to SPI 7FETs current
- 16:32, 15 February 2012 diff hist 0 m 7FETs moved SPI 6FETs to SPI 7FETs
- 22:17, 8 February 2012 diff hist +173 RGB clock →The software
- 22:11, 8 February 2012 diff hist +1 RGB clock →Test modes
- 21:54, 8 February 2012 diff hist +4 Main Page
- 21:52, 8 February 2012 diff hist -2,003 m SPI LCD Reverted edits by Rew (Talk) to last revision by Tom